Estimating Non-Ideal Effects within a Top-Down Methodology for the Design of Continuous-Time Delta-Sigma Modulators-Reference-Cited by-同舟云学术

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Estimating Non-Ideal Effects within a Top-Down Methodology for the Design of Continuous-Time Delta-Sigma Modulators

Published:2016-06-30 Issue:3 Volume:16 Page:319-329
ISSN:1598-1657
Container-title:JSTS:Journal of Semiconductor Technology and Science
language:en
Short-container-title:JSTS:Journal of Semiconductor Technology and Science

Author:

Na Seung-in,Kim Susie,Yang Youngtae,Kim Suhwan

Publisher

The Institute of Electronics Engineers of Korea

Subject

Electrical and Electronic Engineering,Electronic, Optical and Magnetic Materials

Link

http://ocean.kisti.re.kr/downfile/crosscheck/ieek/JAKO201620438446931.pdf

Cited by 2 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. A 2-MHz BW 82-dB DR Continuous-Time Delta–Sigma Modulator With a Capacitor-Based Voltage DAC for ELD Compensation;IEEE Transactions on Very Large Scale Integration (VLSI) Systems;2018-10

2. Modeling of a 200 KHz Bandwidth Low-pass Switch-capacitor Sigma-delta DAC with a Raised Spur-free Modulator;JOURNAL OF SEMICONDUCTOR TECHNOLOGY AND SCIENCE;2017-10-31

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