P-39: A Highly Stable a-Si:H TFT Gate Driver Circuit with Reducing Clock Duty Ratio
Author:
Publisher
Wiley
Link
http://onlinelibrary.wiley.com/wol1/doi/10.1889/1.3499952/fullpdf
Reference8 articles.
1. Low-Voltage Driven P-Type Polycrystalline Silicon Thin-Film Transistor Integrated Gate Driver Circuits for Low-Cost Chip-on-Glass Panel
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1. High‐reliability gate driver on array using noise sharing of precharging node for thin film transistor–liquid crystal display application;Journal of the Society for Information Display;2020-07-27
2. a-Si:H TFT-based gate driver circuit using Q node as both pull-up and hold-down controller;Semiconductor Science and Technology;2019-05-21
3. Multioutputs single‐stage gate driver on array with wide temperature operable thin‐film‐transistor liquid‐crystal display for high resolution application;Journal of the Society for Information Display;2018-11-14
4. Design of dual-outputs-single-stage a-Si:H TFT gate driver for high resolution TFT-LCD application;Journal of the Society for Information Display;2016-05
5. P-17: New Gate Driver Circuit for Slim-Border TFT-LCD Applications;SID Symposium Digest of Technical Papers;2016-05
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