P-50: Power Consumption Ameliorated for Integrated Gate Driver Circuit with Low Frequency Clock
Author:
Publisher
Wiley
Link
http://onlinelibrary.wiley.com/wol1/doi/10.1889/1.3621070/fullpdf
Reference10 articles.
1. High-Resolution Integrated a-Si Row Driver Circuits;Kim;SID 05 DIGEST.,2005
2. 2.0 inch a-Si:H TFT-LCD with Low Noise Integrated Gate Driver;Oh;SID 05 DIGEST.,2005
3. J.H. Koo J.W. Choi Y.S. Kim M.H. Kang J. Jang “Amorphous Silicon Gate Driver with High Stability” 1271 1274 2006
4. Distinguished Student Paper: Noble a-Si:H Gate Driver with High Stability;Choi;SID 08 DIGEST,2008
5. Design of Integrated a-Si Gate Driver Circuits for Low Power Consumption;Hwang;SID 08 DIGEST.,2008
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1. P-47: A Gate Driver Circuit with a-IGZO TFTs for 8-inch QXGA TFT-LCD Panel;SID Symposium Digest of Technical Papers;2017-05
2. P-38: A Narrow Gate Driver Circuit with a-Si TFTs for 8″ WQXGA TFT-LCD Panel;SID Symposium Digest of Technical Papers;2015-06
3. P.6: An Integrated a-Si:H Gate Driver Circuit Design for Large-sized TFT- LCD Applications;SID Symposium Digest of Technical Papers;2013-06
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