First Draft of a Report on the Continuum Computer Architecture

Abstract

HPC is entering a point of singularity where previous technology trends (Moore’s Law etc.) are terminating and dramatic performance progress may depend on advances in computer architecture outside of the scope of conventional practices. This may extend to the opportunities potentially available through the context of non-von Neumann architectures. Curiously, this is not a new field but suffered from the relatively easy growth potential powered by decades of Moore’s Law including resulting improvements in device density and clock rates. Cellular automata, static and dynamic data flow, systolic arrays, and neural nets have demonstrated alternative approaches to von Neumann derivative architectures throughout past decades, each exhibiting unique advantages but also imposing open challenges and time to delivery. A new class of non von Neumann architecture is being pursued and recent scaling studies suggest that its genus or structure, called here “Continuum Computer Architecture (CCA)”, has the possibility to scale many orders of magnitude beyond present day HPC systems. Further, by incorporating select mechanisms for the purpose, it may greatly enhance dynamic graph processing even further. This presentation will describe elements of this study on the scaling of CCA and suggest with a change in enabling technology towards the latter half of the next decade may yield at least peak capabilities of Zettaflops and beyond at practical power, size, and cost.