Verification and Parameter Synthesis for Real-Time Programs using Refinement of Trace Abstraction*

Author:

Cassez Franck1,Jensen Peter Gjøl2,Guldstrand Larsen Kim3

Affiliation:

1. Department of Computing, Macquarie University, Sydney, Australia. franck.cassez@mq.edu.au

2. Department of Computer Science, Aalborg University, Denmark. pgj@cs.aau.dk

3. Department of Computer Science, Aalborg University, Denmark. kgl@cs.aau.dk

Abstract

We address the safety verification and synthesis problems for real-time systems. We introduce real-time programs that are made of instructions that can perform assignments to discrete and real-valued variables. They are general enough to capture interesting classes of timed systems such as timed automata, stopwatch automata, time(d) Petri nets and hybrid automata. We propose a semi-algorithm using refinement of trace abstractions to solve both the reachability verification problem and the parameter synthesis problem for real-time programs. All of the algorithms proposed have been implemented and we have conducted a series of experiments, comparing the performance of our new approach to state-of-the-art tools in classical reachability, robustness analysis and parameter synthesis for timed systems. We show that our new method provides solutions to problems which are unsolvable by the current state-of-the-art tools.

Publisher

IOS Press

Subject

Computational Theory and Mathematics,Information Systems,Algebra and Number Theory,Theoretical Computer Science

Cited by 2 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献

1. Timed Automata Verification and Synthesis via Finite Automata Learning;Tools and Algorithms for the Construction and Analysis of Systems;2023

2. Trace Abstraction-Based Verification for Uninterpreted Programs;Formal Methods;2021

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