Design and implementation of two-dimensional digital finite impulse response filter using very high speed integrated circuit hardware description language

Author:

Singh Thingujam ChurchilORCID,Kumar ManojORCID

Abstract

<span>The main purpose of this paper is to design a two-dimensional digital finite impulse response (FIR) filter using data broadcast and non-broadcast structure. The implementation of two-dimensional digital FIR filter is done using very high speed integrated circuit hardware description language (VHDL). Rectangular window method is used for calculating 2D digital FIR filter coefficients for data broadcast and non-broadcast structure. The coefficients of the one-dimensional digital FIR filter are obtained using the MATLAB filter design and analysis (FDA) tool for two different cut-off frequencies and are multiplied to get the necessary coefficient for the two-dimensional FIR filter to be designed; the simulation is done on Artix-7 series field programmable gate array (FPGA), target device (xc7a35t-cpg236) using Vivadov.2015.2. The proposed design reduces the area utilization and the power consumption when compared with the existing literature. The experimental result shows that the power consumption is improved by 97% and there is an improvement of 24% in area utilization for the two-dimensional with and without data broadcast one dimensional FIR filter structures.</span>

Publisher

Institute of Advanced Engineering and Science

Subject

Electrical and Electronic Engineering,General Computer Science

Cited by 2 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献

1. Energy Efficient 2D FIR Filter and Multiplier Design for Image Processing Applications;2024 IEEE International Conference on Information Technology, Electronics and Intelligent Communication Systems (ICITEICS);2024-06-28

2. Design of RNS-KSA Based 2D FIR Filter;2024 IEEE International Conference on Information Technology, Electronics and Intelligent Communication Systems (ICITEICS);2024-06-28

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