Design and implementation of 4 bit binary weighted current steering DAC
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Published:2020-12-01
Issue:6
Volume:10
Page:5642
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ISSN:2722-2578
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Container-title:International Journal of Electrical and Computer Engineering (IJECE)
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language:
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Short-container-title:IJECE
Author:
Patel Jayeshkumar J.,Naik Amisha P.
Abstract
A compact current-mode Digital-to-Analog converter (DAC) suitable for biomedical application is repesented in this paper .The designed DAC is binary weighted in 180nm CMOS technology with 1.8V supply voltage. In this implementation, authors have focused on calculaton of Non linearity error say INL and DNL for 4 bit DAC having various type of switches: NMOS, PMOS and Transmission Gate. The implemented DAC uses lower area and power compared to unary architecture due to absence of digital decoders. The desired value of Integrated non linearity (INL) and Differential non linearity (DNL) for DAC for are within a range of +0.5LSB. Result obtained in this works for INL and DNL for the case DAC using Transmission Gate is +0.34LSB and +0.38 LSB respectively with 22mW power dissipation.
Publisher
Institute of Advanced Engineering and Science
Subject
Electrical and Electronic Engineering,General Computer Science
Cited by
1 articles.
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