Clean graphene interfaces by selective dry transfer for large area silicon integration-Reference-Cited by-同舟云学术

Clean graphene interfaces by selective dry transfer for large area silicon integration

Published:2016 Issue:14 Volume:8 Page:7523-7533
ISSN:2040-3364
Container-title:Nanoscale
language:en
Short-container-title:Nanoscale

Author:

Na S. R.¹²³⁴⁵,Rahimi S.⁶⁴⁵,Tao L.⁶⁴⁵,Chou H.⁶⁴⁵,Ameri S. K.¹²³⁴⁵,Akinwande D.⁶⁴⁵,Liechti K. M.¹²³⁴⁵

Affiliation:

1. Department of Aerospace Engineering and Engineering Mechanics

2. Research Center for the Mechanics of Solids

3. Structures and Materials

4. The University of Texas at Austin

5. Austin, USA

6. Department of Electrical and Computer Engineering

Abstract

Graphene grown by chemical vapor deposition on a silicon wafer can be selectively transferred to a second wafer by delamination along the graphene/copper interface or the copper/silicon oxide interfaces of the seed wafer by controlling the separation rate.

Funder

Division of Engineering Education and Centers

Publisher

Royal Society of Chemistry (RSC)

Subject

General Materials Science

Link

http://pubs.rsc.org/en/content/articlepdf/2016/NR/C5NR06637A

Reference27 articles.

1. Graphene photonics and optoelectronics

2. Graphene transistors

3. Wafer-Scale Graphene Integrated Circuit

4. Measurement of the Elastic Properties and Intrinsic Strength of Monolayer Graphene

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