Development, Challenges, and Future Opportunities of Spintronic Memory Devices

Abstract

Recently, the development of spintronic memory devices such as spin-transfer torque MRAM (STT-MRAM) has become more critical since it has been demonstrated that it can used as a last level of cache or in embedded memory applications. However, there are some technological challenges such as lowering the write current, scaling of the device cell size, reducing the resistance-area product of the MTJ, etc. In this article, we reviewed the physics and development of several spintronic memory candidates including spin–orbit torque MRAM (SOT-MRAM), voltage-controlled exchange coupling MRAM (VCEC-MRAM), and magnetoelectric MRAM (ME-MRAM). We also benchmark the write and read performances of these candidates against SRAM. Last, the future application of spintronic devices in neuromorphic computing is also discussed.