Abstract
AbstractWe propose a quantum processor architecture, the qubit ‘pipeline’, in which run-time scales additively as functions of circuit depth and run repetitions. Run-time control is applied globally, reducing the complexity of control and interconnect resources. This simplification is achieved by shuttling N-qubit states through a large layered physical array of structures which realise quantum logic gates in stages. Thus, the circuit depth corresponds to the number of layers of structures. Subsequent N-qubit states are ‘pipelined’ densely through the structures to efficiently wield the physical resources for repeated runs. Pipelining thus lends itself to noisy intermediate-scale quantum (NISQ) applications, such as variational quantum eigensolvers, which require numerous repetitions of the same or similar calculations. We illustrate the architecture by describing a realisation in the naturally high-density and scalable silicon spin qubit platform, which includes a universal gate set of sufficient fidelity under realistic assumptions of qubit variability.
Publisher
Springer Science and Business Media LLC
Reference78 articles.
1. Preskill, J. Quantum computing and the entanglement frontier. Preprint at https://arxiv.org/abs/1203.5813 (2012).
2. Lloyd, S. Ultimate physical limits to computation. Nature 406, 1047 (2000).
3. Mizel, A., Lidar, D. A. & Mitchell, M. Simple proof of equivalence between adiabatic quantum computation and the circuit model. Phys. Rev. Lett. 99, 070502 (2007).
4. Nielsen, M. A. Cluster-state quantum computation. Rep. Math. Phys. 57, 147–161 (2006).
5. Deutsch, D. E. Quantum computational networks. Proc. R. Soc. Lond. A. Math. Phys. 425, 73–90 (1989).