Multiplication free Fast-Adaptive Binary Range Coder using ISW

Abstract

Data compression is defined as the process of encoding, converting and modifying the bits-structures of data in such a way that reduces less-spaces on the disk. Fast-ABRC, a new context ABRC for compressing the image and video. This paper introduces novel hardware F-ABRC (Fast-adaptive binary range coder) and architecture of VLSI, as it doesn’t have requirement of LUTs (Look-up-Tables) and also it is completely multiplication free. To get the result, we will combine the utilization of simple operation to compute the approximation after encoding every single symbol and the PE (probability estimation) on the basis of ISW (Imaginary Sliding Window) with approximation of the multiplication. We have represented our introduced algorithm, which is faster and in comparison, to the existing model it gives superior compression efficiency and the comparison takes place on the basis of two parameters such as power dissipation (Dynamic and Static) and device utilization.