Switching On/Off Negative Capacitance in Ultrathin Ferroelectric/Dielectric Capacitors

Author:

Acharya Jagaran1ORCID,Goul Ryan1,Wilt Jamie1ORCID,Wu Judy1

Affiliation:

1. Department of Physics and Astronomy, University of Kansas, Lawrence, Kansas 66045, United States

Funder

Army Research Office

Division of Electrical, Communications and Cyber Systems

Division of Materials Research

Publisher

American Chemical Society (ACS)

Subject

General Materials Science

Reference56 articles.

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3. Fuketa, H.; Yasufuku, T.; Iida, S.; Takamiya, M.; Nomura, M.; Shinohara, H.; Sakurai, T. In Device-Circuit Interactions in Extremely Low Voltage Cmos Designs, International Electron Devices Meeting; IEEE, 2011; pp 25.21. 21–25.21. 24.

4. Fuketa, H.; Iida, S.; Yasufuku, T.; Takamiya, M.; Nomura, M.; Shinohara, H.; Sakurai, T. In A Closed-Form Expression for Estimating Minimum Operating Voltage (V Ddmin) of Cmos Logic Gates, Proceedings of the 48th Design Automation Conference; ACM, 2011; pp 984–989.

5. Ultrathin (<4 nm) SiO2 and Si–O–N gate dielectric layers for silicon microelectronics: Understanding the processing, structure, and physical and electrical limits

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