1. Hwang, C. H.; Li, Y.InModeling of Work-Function Fluctuation for 16 nm FinFET Devices with TiN/HfSiON Gate Stack. InProceedings of 2010 International Symposium on VLSI Technology, System and Application;Hsinchu, Taiwan, April 26–28, 2010;IEEE:Piscataway, NJ, 2010; pp74–75.
2. Cheng, H. W.; Li, Y.Random Work Function Variation Induced Threshold Voltage Fluctuation in 16-nm Bulk FinFET Devices with High-K-Metal-Gate Material. In2010 14th International Workshop on Computational Electronics;Pisa, Italy, Oct 26–29, 2010;IEEE:Piscataway, NJ, 2010; pp1–4.
3. Dupre, C.; Hubert, A.; Becu, S.; Jublot, M.; Maffini-Alvaro, V.; Vizioz, C.; Aussenac, F.; Arvet, C.; Barnola, S.; Hartmann, J. M.; Garnier, G.; Allain, F.; Colonna, J. P.; Rivoire, M.; Baud, L.; Pauliac, S.; Loup, V.; Chevolleau, T.; Rivallin, P.; Guillaumot, B.; Ghibaudo, G.; Faynot, O.; Ernst, T.; Deleonibus, S.15 nm-Diameter 3D Stacked Nanowires with Independent Gates Operation. In2008 IEEE International Electron Devices Meeting;San Francisco, CA, Dec 15–17, 2008;IEEE:Piscataway, NJ, 2008; pp1–4.
4. Investigation of Electrical Characteristics on Surrounding-Gate and Omega-Shaped-Gate Nanowire FinFETs
5. Fu-Liang, Y.; Di-Hong, L.; Hou-Yu, C.; Chang-Yun, C.; Sheng-Da, L.; Cheng-Chuan, H.; Tang-Xuan, C.; Hung-Wei, C.; Chien-Chao, H.; Yi-Hsuan, L.; Chung-Cheng, W.; Chi-Chun, C.; Shih-Chang, C.; Ying-Tsung, C.; Ying-Ho, C.; Chih-Jian, C.; Bor-Wen, C.; Peng-Fu, H.; Jyu-Horng, S.; Han-Jan, T.; Yee-Chia, Y.; Yiming, L.; Jam-Wem, L.; Pu, C.; Mong-Song, L.; Chenming, H.5 nm-Gate Nanowire FinFET. InDigest of Technical Papers, 2004 Symposium on VLSI Technology;Snowbird, UT, June 15–17, 2004;IEEE:Piscataway, NJ, 2004; pp196–197.