CMOS-Analogous Wafer-Scale Nanotube-on-Insulator Approach for Submicrometer Devices and Integrated Circuits Using Aligned Nanotubes-Reference-Cited by-同舟云学术

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CMOS-Analogous Wafer-Scale Nanotube-on-Insulator Approach for Submicrometer Devices and Integrated Circuits Using Aligned Nanotubes

Published:2009-01-14 Issue:1 Volume:9 Page:189-197
ISSN:1530-6984
Container-title:Nano Letters
language:en
Short-container-title:Nano Lett.

Author:

Ryu Koungmin,Badmaev Alexander,Wang Chuan,Lin Albert,Patil Nishant,Gomez Lewis,Kumar Akshay,Mitra Subhasish,Wong H.-S. Philip,Zhou Chongwu

Publisher

American Chemical Society (ACS)

Subject

Mechanical Engineering,Condensed Matter Physics,General Materials Science,General Chemistry,Bioengineering

Link

https://pubs.acs.org/doi/pdf/10.1021/nl802756u

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