Wafer-Scale, Sub-5 nm Junction Formation by Monolayer Doping and Conventional Spike Annealing-Reference-Cited by-同舟云学术

Wafer-Scale, Sub-5 nm Junction Formation by Monolayer Doping and Conventional Spike Annealing

Published:2009-01-22 Issue:2 Volume:9 Page:725-730
ISSN:1530-6984
Container-title:Nano Letters
language:en
Short-container-title:Nano Lett.

Author:

Ho Johnny C.¹,Yerushalmi Roie¹,Smith Gregory¹,Majhi Prashant¹,Bennett Joseph¹,Halim Jeffri¹,Faifer Vladimir N.¹,Javey Ali¹

Affiliation:

1. Department of Electrical Engineering and Computer Sciences, Berkeley Sensor and Actuator Center, University of California at Berkeley, Berkeley, California 94720, Materials Sciences Division, Lawrence Berkeley National Laboratory, Berkeley, California 94720, SEMATECH, Austin, Texas 78741, SVTC Technologies, Austin, Texas 78741, and Frontier Semiconductor, Inc., San Jose, California 95112

Publisher

American Chemical Society (ACS)

Subject

Mechanical Engineering,Condensed Matter Physics,General Materials Science,General Chemistry,Bioengineering

Link

https://pubs.acs.org/doi/pdf/10.1021/nl8032526

Reference24 articles.

1. The drive to miniaturization

2. Technological challenges of advanced CMOS processing and their impact on design aspects

3. Implantation and transient boron diffusion: the role of the silicon self-interstitial

4. Ultra-shallow junction formation by B18H22 ion implantation

5. Gas cluster ion beam infusion processing of semiconductors

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