Influence of PUB2 on the Leveling Effect of Chip Copper Connection Electroplating: Mechanism and Applications
Author:
Affiliation:
1. School of Chemistry and Chemical Engineering, Chongqing University, Chongqing 400044, China
2. Hubei Sinophorus Electronic Materials Co., Ltd., Hubei 443007, China
Funder
National Key Research and Development Program of China
National Natural Science Foundation of China
Publisher
American Chemical Society (ACS)
Link
https://pubs.acs.org/doi/pdf/10.1021/acsomega.3c09548
Reference30 articles.
1. Reliability challenges in 3D IC packaging technology
2. Study on the behaviors of Cu filling in special through-silicon-vias by the simulation of electric field distribution
3. Review—Management of Copper Damascene Plating
4. Kim, B.; Sharbono, C.; Ritzdorf, T.; Schmauch, D. Factors Affecting Copper Filling Process within High Aspect Ratio Deep Vias for 3D Chip Stacking. 56th Electronic Components and Technology Conference 2006, 2006.10.1109/ECTC.2006.1645755.
5. Fractal Growth of Quasi Two-Dimensional Copper Dendrites by Template-free Electrodeposition
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