Fabrication of CFETs with Vertically Stacked p-SiGe/n-Si Channels by SiGe/Ge/Si Multilayer Epitaxy and Ge Selective Etching-Reference-Cited by-同舟云学术

Fabrication of CFETs with Vertically Stacked p-SiGe/n-Si Channels by SiGe/Ge/Si Multilayer Epitaxy and Ge Selective Etching

Published:2024-05-31 Issue:6 Volume:6 Page:4304-4310
ISSN:2637-6113
Container-title:ACS Applied Electronic Materials
language:en
Short-container-title:ACS Appl. Electron. Mater.

Author:

Chu Chun-Lin¹,Chen Szu-Hung¹,Chang Wei-Yuan¹,Hsu Shu-Han²^ORCID,Luo Guang-Li¹^ORCID,Wu Wen-Fa¹

Affiliation:

1. Taiwan Semiconductor Research Institute, National Applied Research Laboratories, Hsinchu 30076, Taiwan

2. School of Integrated Science and Technology (ISI), Sirindhorn International Institute of Technology (SIIT), Thammasat University, Pathum Thani 12120, Thailand

Publisher

American Chemical Society (ACS)

Link

https://pubs.acs.org/doi/pdf/10.1021/acsaelm.4c00411

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