Designing the optimal bit: balancing energetic cost, speed and reliability

Author:

Deshpande Abhishek12ORCID,Gopalkrishnan Manoj3,Ouldridge Thomas E.4,Jones Nick S.1

Affiliation:

1. Department of Mathematics, Imperial College London, London SW7 2AZ, UK

2. School of Technology and Computer Science, Tata Institute of Fundamental Research, Mumbai 400005, India

3. Department of Electrical Engineering, Indian Institute of Technology Bombay, Powai, Mumbai 400076, India

4. Department of Bioengineering, Imperial College London, London SW7 2AZ, UK

Abstract

We consider the challenge of operating a reliable bit that can be rapidly erased. We find that both erasing and reliability times are non-monotonic in the underlying friction, leading to a trade-off between erasing speed and bit reliability. Fast erasure is possible at the expense of low reliability at moderate friction, and high reliability comes at the expense of slow erasure in the underdamped and overdamped limits. Within a given class of bit parameters and control strategies, we define ‘optimal’ designs of bits that meet the desired reliability and erasing time requirements with the lowest operational work cost. We find that optimal designs always saturate the bound on the erasing time requirement, but can exceed the required reliability time if critically damped. The non-trivial geometry of the reliability and erasing time scales allows us to exclude large regions of parameter space as suboptimal. We find that optimal designs are either critically damped or close to critical damping under the erasing procedure.

Funder

Royal Society

Department of Mathematics, Imperial College London

Publisher

The Royal Society

Subject

General Physics and Astronomy,General Engineering,General Mathematics

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