Author:
Yanushkevich S. N.,Shmerko V. P.,Steinbach B.
Abstract
This paper addresses the interconnect problem for the representation of logic networks in spatial dimensions. Interest in spatial interconnects is motivated by the advent of nanotechnologies and by consequent attempts to evaluate and explore the appropriate nanoscale architectures.
It have been shown in our previous study that a 3D logic network with target topology can be designed by replacing each elementary logic block in a network by its 3D model. In this paper, we study the problem of the partitioning of these 3D blocks with respect to the constraints of logic function
interconnects and hypercube-like topology. We found that decomposition techniques provide flexibility in choosing switching functions for assembling the decomposed sub-networks.
Publisher
American Scientific Publishers
Subject
Electrical and Electronic Engineering,Computational Mathematics,Condensed Matter Physics,General Materials Science,General Chemistry
Cited by
12 articles.
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