Affiliation:
1. Indira Gandhi Delhi Technical University, Kashmere Gate, 110006, New Delhi, India
Abstract
The ever-increasing complexity and prohibitive fabrication costs associated with VLSI circuits necessitate the development of techniques that prioritize low power consumption and high-speed analog blocks. In today’s era of smart IoT devices, which are pervasive and heavily reliant
on efficient battery backups, the demand for low power architectures is paramount to preserve battery life and reduce weight. Simultaneously, maintaining high-speed performance and incorporating additional features is crucial in the wireless industry. Amplifiers, being fundamental front-ends
in transceiver design, significantly impact the overall performance of transceivers. Consequently, this study aims to provide a comprehensive and systematic review of amplifier techniques, with a specific focus on low-power and high-speed approaches, following the Preferred Reporting Items
for Systematic Review and Meta-Analysis (PRISMA) methodology. The findings presented herein identify the current state of research in the defined area and highlight potential avenues for future exploration.
Publisher
American Scientific Publishers
Subject
Electrical and Electronic Engineering,Electronic, Optical and Magnetic Materials
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