Power Pad Based on Structure Stacking for Ultralow-Power Three-Axis Capacitive Sensing Applications

Author:

Lin Chih-Hsuan1,Wen Kuei-Ann1

Affiliation:

1. Department of Electronic Engineering, National Chiao Tung University, Hsinchu 300, Taiwan

Abstract

Ultralow-power sensing systems are a trend in handheld devices. The leakage-current-induced power consumption of traditional power pads has not been able to satisfy the specifications of three-axis ultralow-power sensing systems at high temperatures. In this paper, we present a transient detector and delay cell based on resistor and capacitor charge and discharge, two layers of structure stacking based on a metal–oxide–semiconductor, and gate-driven/substrate-driven/gate and substrate-driven methods to guide away the electrostatic current when electrostatic discharge events occur without influencing the three-axis ultralow-power sensing system. Then, we propose a stacking structure based on a metal–oxide–semiconductor to decrease leakage-current-induced power consumption, which is proportional to temperature. Moreover, we analyze whether the gate-driven/substrate-driven/gate method or substrate-driven method is most cost effective as well as the mechanism of substrate noise suppression of the two layers of structure stacking. The power pad based on the gate-driven metal–oxide–semiconductor with three structural stacks, power pad based on the gate-driven metal–oxide–semiconductor with structural stacking, power pad based on the substrate-driven metal–oxide–semiconductor with structural stacking, and the power pad based on both the gate-driven and substrate-driven metal–oxide–semiconductors with structural stacking have an electrostatic discharge standard with both positive and negative modes higher than 8/8, 8/8, 5/- kV, and 5.5/- kV for the human body model and an electrostatic discharge standard with both positive and negative modes higher than 1000/1000, 600/550, 500/- V, 300/- V for the machine model. The leakage-current-induced power consumption of the power pad based on the gate-driven metal–oxide–semiconductor with structure stacking, the power pad based on the substrate-driven metal–oxide–semiconductor with structure stacking, the power pad based on both the gate-driven, and the substrate-driven metal–oxide–semiconductor with structure stacking are approximately 3.5 pW/16.45 nW, 20 pW/- nW, and 2.89 pW/16.89 nW at 25/125 °C when the voltage of the input pin was 1.0 V.

Publisher

American Scientific Publishers

Subject

Electrical and Electronic Engineering,Electronic, Optical and Magnetic Materials

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