Efficient Evaluation of Power/Area/Latency Design Trade-Offs for Coarse-Grained Reconfigurable Processor Arrays
-
Published:2011-02-01
Issue:1
Volume:7
Page:29-40
-
ISSN:1546-1998
-
Container-title:Journal of Low Power Electronics
-
language:en
-
Short-container-title:Journal of Low Power Electronics
Author:
Kissler Dmitrij,Hannig Frank,Teich Jürgen
Publisher
American Scientific Publishers
Subject
Electrical and Electronic Engineering
Cited by
1 articles.
订阅此论文施引文献
订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献