Author:
Patanjali S. L. P. S. K.,Patnaik Milan,Potluri Seetal,Kamakoti V.
Publisher
American Scientific Publishers
Subject
Electrical and Electronic Engineering
Cited by
6 articles.
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1. Design of PnR Flow For Block Level Chip for Optimizing Leakage Power;2024 Third International Conference on Intelligent Techniques in Control, Optimization and Signal Processing (INCOS);2024-03-14
2. Efficient and Accurate ECO Leakage Optimization Framework With GNN and Bidirectional LSTM;IEEE Transactions on Very Large Scale Integration (VLSI) Systems;2023-09
3. ECO-GNN: Signoff Power Prediction using Graph Neural Networks with Subgraph Approximation;ACM Transactions on Design Automation of Electronic Systems;2022-10-27
4. A Graph Neural Network Method for Fast ECO Leakage Power Optimization;2022 27th Asia and South Pacific Design Automation Conference (ASP-DAC);2022-01-17
5. A fast learning-driven signoff power optimization framework;Proceedings of the 39th International Conference on Computer-Aided Design;2020-11-02