Design and Implement 1 Kb Array Employing Low-Power Low-Voltage 3T Gain-Cell Memory at 45 nm Scheme
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Published:2017-07-01
Issue:7
Volume:12
Page:717-723
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ISSN:1555-130X
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Container-title:Journal of Nanoelectronics and Optoelectronics
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language:en
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Short-container-title:Journal of Nanoelectronics and Optoelectronics
Author:
Varshney Tarushree,Khandelwal Saurabh,Akashe Shyam
Publisher
American Scientific Publishers
Subject
Electrical and Electronic Engineering,Electronic, Optical and Magnetic Materials