Frequency Analysis of 32-bit Modular Divider Based on Extended GCD Algorithm for Different FPGA chips

Author:

Al-Hiaja Qasem Abu,AlShuaibi Abdullah,Al Badawi Ahmad

Abstract

Modular inversion with large integers and modulus is a fundamental operation in many public-key cryptosystems. Extended Euclidean algorithm (XGCD) is an extension of Euclidean algorithm (GCD) used to compute the modular multiplicative inverse of two coprime numbers. In this paper, we propose a Frequency Analysis study of 32-bit modular divider based on extended-GCD algorithm targeting different chips of field-programmable gate array (FPGA). The experimental results showed that the design recorded the best performance results when implemented using Kintex7 (xc7k70t-2-fbg676) FPGA kit with a minimum delay period of 50.63 ns and maximum operating frequency of 19.5 MHz. Therefore, the proposed work can be embedded with many FPGA based cryptographic applications.

Publisher

CIRWOLRD

Subject

General Earth and Planetary Sciences,General Environmental Science

Cited by 5 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献

1. Design and Implementation of 32-bit Signed Divider for VLSI Applications;2023 7th International Conference on Electronics, Communication and Aerospace Technology (ICECA);2023-11-22

2. Lightweight Architecture for Elliptic Curve Scalar Multiplication over Prime Field;Electronics;2022-07-17

3. Pipelined Implementation of Millar-Rabin Primality Tester Using Altera FPGA Kit;Communications in Computer and Information Science;2020

4. Performance Analysis of 128-bit Modular Inverse Based Extended Euclidean Using Altera FPGA Kit;Procedia Computer Science;2019

5. Implementing a lightweight Schmidt-Samoa cryptosystem (SSC) for sensory communications;International Journal on Smart Sensing and Intelligent Systems;2019

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