A 3-Phase Reduced Switch Count Symmetric 17-Level Inverter Topology Supplying a Resistive Load
Author:
Affiliation:
1. Government College of Engineering Srirangam, Tiruchirappalli, India
Publisher
FapUNIFESP (SciELO)
Link
http://www.scielo.br/scielo.php?script=sci_pdf&pid=S1516-89132024000100622&tlng=en
Reference21 articles.
1. A review on modulation strategies for multilevel inverter;Balamurugan CR;Indones J Electr Eng Comput Sci,2016
2. Multilevel inverters - a survey of topologies, controls and applications;Rodriguez J;IEEE Trans Ind Electron,2002
3. Dual two-level inverter scheme for an open-end winding induction motor drive with a single DC power supply and improved DC bus utilization;Somasekhar VT;IEE Proc - Electr Power Appl,2004
4. A new multilevel inverter topology with reduced DC sources;Rawa M;Energies,2021
5. Performance analysis of nested multilevel inverter topology for 72V electric vehicle applications;Narendra kumar M;J Eur Syst Autom,2020
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