Author:
Martin Antonella,Spinolo Giulia,Morin Sonia,Bacchetta Maurizio,Frigerio Francesca,Bonner Benjamin A.,McKeever Peter,Tremolada Maurizio,Iyer Anand
Abstract
AbstractThe development of a direct polish process for STI CMP on 200mm wafers using highselectivity slurry (HSS) has been achieved for production of 0.13μm technology microelectronic devices. The new process has improved on-wafer performance compared to standard STI CMP processes. The step height range across the wafer was decreased by 84%, planarity Cpk values (silicon nitride thickness and step-height uniformity) were increased by >25%, leakage current statistics were superior, and the cost of ownership was lowered by 78%. Cross-sectional SEMs both after direct polish CMP and after removal of the silicon nitride show improved planarity.
Publisher
Springer Science and Business Media LLC
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