The Growth, Characterization and Electronic Device Applications of GaAs/Si

Abstract

AbstractWe review the growth of GaAs on Si by MO-CVD and MBE and discuss the relative merits of these techniques. Major emphasis is placed on the structural and optical characterization of the material that may be indicative of device performance. Typical GaAs layers on Si are free of anti- phase domains and the crystallinity at the surface for a 3-4μm thick deposit approaches that of bulk GaAs, as evidenced by the RBS backscattering yields and Si ion implantation profiles. The major drawbacks of GaAs heteroepitaxy on Si are the very large dislocation densities (106- 109cm−2), the relatively high unintentional doping concentration (>5 × 1014cm−3) that is partly attributable to Si outdiffusion, and the excessive bowing due to thermal expansion coefficient mismatch. While there are growth and processing techniques to overcome bowing or at least its influence, dislocations and low resistivity are hard to remedy. We discuss novel schemes to reduce dislocations (selective area growth, superlattices and thermal cycling) and efforts to improve the electrical properties (doping, optimization of V/III ratio). A variety of electronic devices and circuits have been fabricated using GaAs/Si. We shall present results on MESFETs, HBTs and HFETs processed in our laboratory and elsewhere. It is quite encouraging that HFETs with a transconductance of 220mS/mm are achievable. However, lasers in room temperature CW operation still have a very limited lifetime. Finally, we discuss the implications of GaAs/Si for a broader area of mismatched heteroepitaxy (InP/Si, InP/GaAs, etc.) and speculate on the future prospects for this new materials technology.