Polysilicon/Silicon Interfaces: Effect of Processing Parameters on Physical and Electrical Properties

Abstract

ABSTRACTAn arsenic doped polysilicon emitter structure is widely used as an important technology for high speed BiPolar and BiCMOS VLSI devices. The electrical behavior of such emitters is dictated to a large degree by the structure of the polysilicon/silicon interface and the extent of any interfacial oxide. In particular the contact resistance of n+ and p+ diffused regions of the polysilicon is sensitive to the interfacial structure. The microstructure of the polysilicon, in addition to the interface, dictates the junction depth and electrical properties and is determined by the deposition conditions and subsequent doping and annealing processes. The interface itself is defined largely by the cleaning procedure and the initial stages of the deposition process. In this paper we report the effects of process variables, such as deposition temperature, doping and annealing times and temperatures and pre-cleans on the microstructure and electrical properties of poly-emitters.