Performance Advantages of Submicron Silicon-On-Insulator Devices for ULSI

Abstract

AbstractIn this paper the various performance advantages of SOI and SOS structures for submicron ULSI circuits will be described. In addition to the traditional speed and radiation-hardness advantages, there are several significant advantages of thin-film SOI compared to bulk structures for the submicron scaling of MOS transistors. These advantages include short-channel threshold voltage stability, improved sub-threshold slope, increased saturation current, and reduced hot electron effects. Both theory and data from several groups will be presented to illustrate these effects. Since these advantages all fall in areas that are critical limits to device engineering and scaling in the submicron regime, the motivation for using SOI should be even stronger as devices are scaled to smaller dimensions in the future. Consideration of SOI or SOS on the ULSI scale will require a technology capable of low defect films with a film thickness of 1000 A or less, however. The prospects for minority carrier devices such as bipolar transistors for BI-MOS will also be discussed. Both device structure (lateral vs. vertical) and material quality are issues that must be addressed.