Physical Modeling of Defects, Dopant Activation and Diffusion in Aggressively Scaled Bulk and SOI Devices: Atomistic and Continuum Approaches

Abstract

AbstractIn this overview we examine how advanced continuum and atomistic modeling can help to understand and resolve process and device design issues for the 65 nm technology generation and beyond. The following implantation-related issues are reviewed: wafer temperature for different types of implant equipment and its impact on defect formation and amorphization, ion scattering off the photoresist mask and its impact on threshold voltage variation, dual rotation halo implant instead of the conventional quad rotation halo implant, and engineering of the source/drain junction overlap for diffusionless annealing by using tilted implants. The following annealing-related issues are also considered: limitations of spike anneal; benefits of cocktail junctions, heat transfer mechanisms for spike and millisecond annealing, and implant damage evolution for different thermal budgets. Taken together, implant, annealing, and layout conditions are shown to explain observed threshold voltage and transistor performance variations. In addition, the effects of transistor geometry on dopant diffusion, activation, and defect formation are shown for several generations of bulk and FDSOI MOSFETs.