A Junction Field Effect Transistor Based on Hydrogenated Amorphous Silicon

Abstract

ABSTRACTAn hydrogenated amorphous silicon junction field effect transistor suitable for analog and digital applications is presented. The device is constituted by a p+ - i - n− junction, with the drain and source contacts patterned on the n-doped layer and the gate electrode patterned on the p+ doped layer. As in the crystalline case, the device is a voltage-controlled resistor, and its drain-source resistance can be varied, with a voltage applied to the gate electrode, by modulating the width of the depletion layer extending into the n-type channel.The doping value of this layer has been chosen as a trade-off between high value of channel conductivity and a relatively low defect density in the material. The manufactured device, with W/L=5000/200 μm, shows the typical current-voltage curves of a JFET. In particular, at low VDS, the current presents the linear behavior of the triode zone, where the JFET operates as a linear resistance whose value is controlled by the gate voltage. At higher VDS the JFET works in the pinch-off region as a dependent current generator.First results are very encouraging, since we have achieved transconductance values of 10−6 V/A, which are comparable to those of state of the art TFT.