The Inclusive-AND (Equivalence, Exclusive-NOR (EXNOR, XNOR)) and Exclusive-OR (EXOR, XOR) Gates in Mixed Logic

Abstract

Mixed logic notation simplifies the analysis and design of digital circuits and supports self-documenting gate level circuits. Additionally, it provides alternative implementations which could result in reducing the number of gates. The current symbol of the Equivalence gate as an Exclusive OR with the output ASSERTED LOW (Exclusive NOR) is troubling when we want to think of the output ASSERTED HIGH. This had impeded extending the mixed logic approach to Exclusive OR. We suggest introducing an alternative distinct symbol for the Equivalence (Inclusive-AND) gate to facilitate the application of the mixed logic concepts to both the Exclusive-OR and the Inclusive-AND gates.