Capillary Underfill Flow Simulation as a Design Tool for Flow-Optimized Encapsulation in Heterogenous Integration
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Published:2023-09-30
Issue:10
Volume:14
Page:1885
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ISSN:2072-666X
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Container-title:Micromachines
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language:en
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Short-container-title:Micromachines
Author:
Stencel Lisa Christin1ORCID, Strogies Jörg1, Müller Bernd1, Knofe Rüdiger1, Borwieck Carsten1, Heimann Matthias1
Affiliation:
1. Siemens AG, T ICE ELM-DE, 13629 Berlin, Germany
Abstract
As the power electronics landscape evolves, pushing for greater vertical integration, capillary underfilling is considered a versatile encapsulation technique suited for iterative development cycles of innovative integration concepts. Since a defect-free application is critical, this study proposes a capillary two-phase flow simulation, predicting both the flow pattern and velocity with remarkable precision and efficiency. In a preliminary performance evaluation, Volume of Fluid (VOF) outperforms the Level-Set method in terms of accuracy and computation time. Strategies like HRIC blending, artificial viscosity, and implicit Multi-Stepping prove effective in optimizing the numerical VOF scheme. Digital mapping using physical experiments and virtual simulations validates transient flow predictions, achieving excellent agreement with deviations as low as 1.48–3.34%. The accuracy of flow predictions is thereby greatly influenced by non-Newtonian viscosity characteristics in the low shear range and time-dependent contact angle variations. The study further explores flow manipulation concepts, focusing on local flow speed adjustment, gap segmentation, and the use of arcuate shapes to influence interface confluence near the chip. Experimental validation corroborates the effectiveness of each design intervention. In conclusion, this research highlights the potential of predictive engineering to develop flow-optimized package designs that enhance reliability while supporting high manufacturing yields.
Subject
Electrical and Electronic Engineering,Mechanical Engineering,Control and Systems Engineering
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