Quantum Algorithm for Variant Maximum Satisfiability
Author:
Alasow Abdirahman,Jin Peter,Perkowski Marek
Abstract
In this paper, we proposed a novel quantum algorithm for the maximum satisfiability problem. Satisfiability (SAT) is to find the set of assignment values of input variables for the given Boolean function that evaluates this function as TRUE or prove that such satisfying values do not exist. For a POS SAT problem, we proposed a novel quantum algorithm for the maximum satisfiability (MAX-SAT), which returns the maximum number of OR terms that are satisfied for the SAT-unsatisfiable function, providing us with information on how far the given Boolean function is from the SAT satisfaction. We used Grover’s algorithm with a new block called quantum counter in the oracle circuit. The proposed circuit can be adapted for various forms of satisfiability expressions and several satisfiability-like problems. Using the quantum counter and mirrors for SAT terms reduces the need for ancilla qubits and realizes a large Toffoli gate that is then not needed. Our circuit reduces the number of ancilla qubits for the terms T of the Boolean function from T of ancilla qubits to ≈log2T+1. We analyzed and compared the quantum cost of the traditional oracle design with our design which gives a low quantum cost.
Funder
Portland State University Open Access Article Processing Charge Fund
Subject
General Physics and Astronomy
Reference77 articles.
1. Marques-Silva, J., and Glass, T. (1999, January 1). Combinational equivalence checking using satisfiability and recursive learning. Proceedings of the Conference on Design, Automation and Test in Europe, Munich, Germany. 2. Konuk, H., and Larrabee, T. (1993, January 6–8). Explorations of sequential ATPG using Boolean satisfiability. Proceedings of the Digest of Papers Eleventh Annual 1993 IEEE VLSI Test Symposium, Atlantic City, NJ, USA. 3. Biere, A., Cimatti, A., Clarke, E.M., Fujita, M., and Zhu, Y. (1999, January 21–25). Symbolic model checking using SAT procedures instead of BDDs. Proceedings of the 36th Annual ACM/IEEE Design Automation Conference, New Orleans, LA, USA. 4. Hong, T., Li, Y., Park, S.B., Mui, D., Lin, D., Kaleq, Z.A., Hakim, N., Naeimi, H., Gardner, D.S., and Mitra, S. QED: Quick error detection tests for effective post-silicon validation. Proceedings of the 2010 IEEE International Test Conference, Austin, TX, USA, 2–4 November 2010. 5. Wang, P.W., Donti, P., Wilder, B., and Kolter, Z. (2019, January 10–15). Satnet: Bridging deep learning and logical reasoning using a differentiable satisfiability solver. Proceedings of the International Conference on Machine Learning, Long Beach, CA, USA.
Cited by
1 articles.
订阅此论文施引文献
订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献
|
|