Affiliation:
1. TECH-NASE Research Group, Department of Chemical Engineering, Universidade de Santiago de Compostela, 15782 Santiago de Compostela, Spain
Abstract
Renewable Energy Sources (RES) are widely used worldwide due to their positive effect on the environment, being sustainable, low cost, and controllable. The power generated from RESs must be configured to interface and perfectly synchronize with the grid by using Power Electronics Converters (PEC). A Phase-Locked Loop (PLL) is one of the most popular synchronization techniques used due to its speed and robustness. A growing issue that results in oscillations in the estimated fundamental grid phase, frequency, and voltage amplitude is the DC-offset in the input of the PLL. This study was developed to eliminate the DC-offset in the single-phase grid synchronization using Delay Signal Cancellation (DSC) and a fixed-length Transfer Delay (TD)-based PLL. Then, the small-signal model, stability analysis, and selection of controller gains were discussed. The proposed PLL was simulated using MATLAB/Simulink. Moreover, to evaluate the proposed method, several scenarios were developed in order to compare it with other powerful PLLs in terms of performance indicators such as settling time, frequency, and phase error. As a result, the proposed PLL has the fastest dynamic response, completely rejects the DC-offset effect, and fully synchronizes with the electrical grid.
Subject
Management, Monitoring, Policy and Law,Renewable Energy, Sustainability and the Environment,Geography, Planning and Development,Building and Construction
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