Selective Area Epitaxy of Quasi-1-Dimensional Topological Nanostructures and Networks

Abstract

Quasi-one-dimensional (1D) topological insulators hold the potential of forming the basis of novel devices in spintronics and quantum computing. While exposure to ambient conditions and conventional fabrication processes are an obstacle to their technological integration, ultra-high vacuum lithography techniques, such as selective area epitaxy (SAE), provide all the necessary ingredients for their refinement into scalable device architectures. In this work, high-quality SAE of quasi-1D topological insulators on templated Si substrates is demonstrated. After identifying the narrow temperature window for selectivity, the flexibility and scalability of this approach is revealed. Compared to planar growth of macroscopic thin films, selectively grown regions are observed to experience enhanced growth rates in the nanostructured templates. Based on these results, a growth model is deduced, which relates device geometry to effective growth rates. After validating the model experimentally for various three-dimensional topological insulators (3D TIs), the crystal quality of selectively grown nanostructures is optimized by tuning the effective growth rates to 5 nm/h. The high quality of selectively grown nanostructures is confirmed through detailed structural characterization via atomically resolved scanning transmission electron microscopy (STEM).