Low-Quality Integrated Circuits Image Verification Based on Low-Rank Subspace Clustering with High-Frequency Texture Components

Abstract

With the vigorous development of integrated circuit (IC) manufacturing, the harmfulness of defects and hardware Trojans is also rising. Therefore, chip verification becomes more and more important. At present, the accuracy of most existing chip verification methods depends on high-precision sample data of ICs. Paradoxically, it is more challenging to invent an efficient algorithm for high-precision noiseless data. Thus, we recently proposed a fusion clustering framework based on low-quality chip images named High-Frequency Low-Rank Subspace Clustering (HFLRSC), which can provide the data foundation for the verification task by effectively clustering those noisy and low-resolution partial images of multiple target ICs into the correct categories. The first step of the framework is to extract high-frequency texture components. Subsequently, the extracted texture components will be integrated into subspace learning so that the algorithm can not only learn the low-rank space but also retain high-frequency information with texture characteristics. In comparison with the benchmark and state-of-the-art method, the presented approach can more effectively process simulation low-quality IC images and achieve better performance.