Common-Mode Reduction SVPWM for Three-Phase Motor Fed by Two-Level Voltage Source Inverter

Abstract

Aiming at the problem of large magnitude and high frequency of common-mode voltage (CMV) when space vector pulse width modulation (SVPWM) is used in a three-phase motor fed by a two-level voltage source inverter, a common-mode reduction SVPWM (CMRSVPWM) is studied. In this method, six new sectors are obtained by rotating six sectors of conventional SVPWM by 30°. In odd-numbered sectors, only three non-zero vectors with odd subscripts are used for synthesis, while in even-numbered sectors, only three non-zero vectors with even subscripts are used for synthesis. The actuation durations of three non-zero vectors in each switching period in each sector are given. Simulation and experimental results show that, compared with the conventional SVPWM, the CMV magnitude of CMRSVPWM is reduced by 66.67% and the CMV frequency of CMRSVPWM is reduced from the original switching frequency to the triple fundamental frequency. At the same time, the current, torque and speed of the motor are still good.