Capacitive Power Transfer System with Reduced Voltage Stress and Sensitivity

Abstract

This paper introduces a DC–DC buck converter on the secondary side of the capacitive power transfer system to reduce the voltage and electric field across the interface, and to reduce the circuit Q, and thus the system sensitivity. The system is mathematically analyzed to study the improvement in sensitivity and voltage stress. The leakage electric field emissions around the plates are investigated by simulation. The analytical and simulation results show that by reducing the duty cycle of the buck converter at a constant output power, the voltage across the plates can be significantly reduced and the circuit becomes less sensitive to the variations in parameters. Experimental results demonstrated that Q and the voltage stress over the capacitive interface are reduced by changing the duty cycle of the buck converter. For delivering 10 W of power, the maximum voltage stress across one pair of the coupling plates is reduced from 211 V in the conventional system without using a DC–DC converter, to 65 V and 44 V at duty cycles of 30% and 20%, respectively. The system achieves an end-to-end power efficiency of 80% at an output power of 10 W and a duty cycle of 30%.