Model Predictive Control of a Modular Multilevel Converter with Reduced Computational Burden

Author:

Kadhum Hussein1ORCID,Watson Alan J.1ORCID,Rivera Marco12ORCID,Zanchetta Pericle1ORCID,Wheeler Patrick13ORCID

Affiliation:

1. Electrical and Electronic Engineering Department, University of Nottingham, Nottingham NG7 2RD, UK

2. Laboratory of Energy Conversion and Power Electronics, Direction of Research, Universidad de Talca, Talca 3341717, Chile

3. Centro de Transformación Energética, Universidad Andrés Bello, Santiago 7550196, Chile

Abstract

Recent advances in high-power applications employing voltage source converters have been primarily fuelled by the emergence of the modular multilevel converter (MMC) and its derivatives. Model predictive control (MPC) has emerged as an effective way of controlling these converters because of its high response. However, the practical implementation of MPC encounters hurdles, particularly in MMCs featuring many sub-modules per arm. This research introduces an approach termed folding model predictive control (FMPC), coupled with a pre-processing sorting algorithm, tailored for modular multilevel converters. The objective is to alleviate a significant part of the computational burden associated with the control of these converters. The FMPC framework combines multiple control objectives, encompassing AC current, DC current, circulating current, arm energy, and leg energy, within a unified cost function. Both simulation studies and real-time hardware-in-the-loop (HIL) testing are conducted to verify the efficacy of the proposed FMPC. The findings underscore the FMPC’s ability to deliver fast response and robust performance under both steady-state and dynamic operating conditions. Moreover, the FMPC adeptly mitigates circulating currents, reduces total harmonic distortion (THD%), and upholds capacitor voltage stability within acceptable thresholds, even in the presence of harmonic distortions in the AC grid. The practical applicability of MMCs, notwithstanding the presence of a large number of sub-modules (SMs) per arm, is facilitated by the significant reduction in switching states and computational overhead achieved through the FMPC approach.

Publisher

MDPI AG

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