Comprehensive Study of SDC Memristors for Resistive RAM Applications

Abstract

Memristors have garnered considerable attention within the scientific community as devices for emerging construction of Very Large Scale Integration (VLSI) systems. Owing to their inherent properties, they appear to be promising candidates for pivotal components in computational architectures, offering alternatives to the conventional von Neumann architectures. This work has focused on exploring potential applications of Self-Directed Channel (SDC) memristors as novel RRAM memory cells. The introductory section of the study is dedicated to evaluating the repeatability of the tested memristors. Subsequently, a detailed account of the binary programming testing process for memristors is provided, along with illustrative characteristics depicting the impact of programming pulses on a memory cell constructed from a memristor. A comprehensive data analysis was then conducted, comparing memristors with varying types of doping. The results revealed that SDC memristors exhibit a high level of switching, certainty between the Low Resistance State (LRS) and High Resistance State (HRS), suggesting their capability to facilitate the storage of multiple bits within a single memory cell.