Positive Bias Temperature Instability in SiC-Based Power MOSFETs-Reference-Cited by-同舟云学术

Positive Bias Temperature Instability in SiC-Based Power MOSFETs

Published:2024-06-30 Issue:7 Volume:15 Page:872
ISSN:2072-666X
Container-title:Micromachines
language:en
Short-container-title:Micromachines

Author:

Volosov Vladislav¹,Bevilacqua Santina²,Anoldo Laura²,Tosto Giuseppe²,Fontana Enzo²,Russo Alfio-lip²,Fiegna Claudio¹,Sangiorgi Enrico¹,Tallarico Andrea Natale¹^ORCID

Affiliation:

1. Advanced Research Center on Electronic System, Department of Electrical, Electronic and Information Engineering, University of Bologna, 47522 Cesena, Italy

2. STMicroelectronics, SRL, Stradale Primosole 50, 95121 Catania, Italy

Abstract

This paper investigates the threshold voltage shift (ΔVTH) induced by positive bias temperature instability (PBTI) in silicon carbide (SiC) power MOSFETs. By analyzing ΔVTH under various gate stress voltages (VGstress) at 150 °C, distinct mechanisms are revealed: (i) trapping in the interface and/or border pre-existing defects and (ii) the creation of oxide defects and/or trapping in spatially deeper oxide states with an activation energy of ~80 meV. Notably, the adoption of different characterization methods highlights the distinct roles of these mechanisms. Moreover, the study demonstrates consistent behavior in permanent ΔVTH degradation across VGstress levels using a power law model. Overall, these findings deepen the understanding of PBTI in SiC MOSFETs, providing insights for reliability optimization.

Funder

TRANSFORM

Publisher

MDPI AG

Link

https://www.mdpi.com/2072-666X/15/7/872/pdf

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