Abstract
We investigate the effects of Line Edge Roughness (LER) of electrode lines on the uniformity of Resistive Random Access Memory (ReRAM) device areas in cross-point architectures. To this end, a modeling approach is implemented based on the generation of 2D cross-point patterns with predefined and controlled LER and pattern parameters. The aim is to evaluate the significance of LER in the variability of device areas and their performances and to pinpoint the most critical parameters and conditions. It is found that conventional LER parameters may induce >10% area variability depending on pattern dimensions and cross edge/line correlations. Increased edge correlations in lines such as those that appeared in Double Patterning and Directed Self-assembly Lithography techniques lead to reduced area variability. Finally, a theoretical formula is derived to explain the numerical dependencies of the modeling method.
Funder
European Association of National Metrology Institutes
Engineering and Physical Sciences Research Council
Subject
General Materials Science
Reference40 articles.
1. Multibit memory operation of metal-oxide bi-layer memristors
2. High Density Crossbar Arrays with Sub- 15 nm Single Cells via Liftoff Process Only
3. Fujitsu Semiconductor Launches World’s Largest Density 4 Mbit ReRAM Product for Mass Production. 2016
https://phys.org/news/2016-10-fujitsu-semiconductor-world-largest-density.html
Cited by
2 articles.
订阅此论文施引文献
订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献