A Survey of of Side-Channel Attacks and Mitigation for Processor Interconnects
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Published:2024-07-31
Issue:15
Volume:14
Page:6699
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ISSN:2076-3417
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Container-title:Applied Sciences
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language:en
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Short-container-title:Applied Sciences
Author:
Yuan Jie12, Zhang Jing12, Qiu Pengfei12, Wei Xinghai12ORCID, Liu Dongxiao12ORCID
Affiliation:
1. School of Cyberspace Security, Beijing University of Posts and Telecommunications, Beijing 100876, China 2. Key Laboratory of Trustworthy Distributed Computing and Service (BUPT), Ministry of Education, Beijing 100876, China
Abstract
With advancements in chip technology, the number of cores in modern commercial processors continues to rise, leading to increased complexity in interconnects and on-chip networks. This complexity, however, exposes significant security vulnerabilities, primarily in the form of side-channel and covert-channel exploits. Unlike other microarchitectural side-channel attacks, those leveraging on-chip interconnects utilize unique characteristics, allowing attackers to develop novel methods that can bypass existing effective defenses. In this paper, we present a comprehensive survey of current side-channel and covert-channel attacks based on processor-on-chip interconnects. We categorize these attacks into three types: contention-based, distance-based, and layout-based, according to the specific interconnect characteristics they exploit, and discuss corresponding countermeasures for each. Finally, we provide an outlook on future development trends in processor interconnect side channels. This survey is the first to specifically focus on interconnect-based side channels in processors.
Funder
the National Key Research and Development Program of China under Grant
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