Hierarchical Transfer Learning for Cycle Time Forecasting for Semiconductor Wafer Lot under Different Work in Process Levels

Abstract

The accurate cycle time (CT) prediction of the wafer fabrication remains a tough task, as the system level of work in process (WIP) is fluctuant. Aiming to construct one unified CT forecasting model under dynamic WIP levels, this paper proposes a transfer learning method for finetuning the predicted neural network hierarchically. First, a two-dimensional (2D) convolutional neural network was constructed to predict the CT under a primary WIP level with the input of spatial-temporal characteristics by reorganizing the input parameters. Then, to predict the CT under another WIP level, a hierarchical optimization transfer learning strategy was designed to finetune the prediction model so as to improve the accuracy of the CT forecasting. The experimental results demonstrated that the hierarchically transfer learning approach outperforms the compared methods in the CT forecasting with the fluctuation of WIP levels.