Closed-Form Formulas for Automated Design of SiC-Based Phase-Shifted Full Bridge Converters in Charger Applications

Abstract

Phase-Shifted Full Bridge (PSFB) topology in its four-diode variant is the choice with the lowest part count in applications that demand high power, high voltage, and galvanic isolation, such as in Electric Vehicle (EV) chargers. Even though the topology is prevalent in power electronics applications, no single, unified analytical model has been proposed for the design process of four-diode PSFB converters. As a result, engineers must rely on simulations and empirical results obtained from previously built converters when selecting components to properly match the DC source voltage level with the DC load voltage requirements. In this work, the authors provide a design-oriented analysis approach for obtaining the output voltage and semiconductor current values, ready for implementation in a spreadsheet- or MATLAB-type software to automate design optimization. The proposed formulas account for all the first-order nonlinear dependencies by considering the impact of each of the following eight design parameters: DC-link voltage, load resistance, phase-shift ratio, switching frequency, transformer turns ratio, magnetizing inductance, series inductance, and output inductance. The results are verified through experiments at the power level of 10 kW and the DC-link voltage level of 800 V by using a grid simulator and a SiC-based two-level Active Front End (AFE) with a DC–DC stage based on the PSFB topology. The accuracy of the output voltage formula is determined to be around 99.6% in experiments and 100.0% in simulations. Based on this exact model, an automated design procedure for high-power high-voltage SiC-based PSFB converters is developed. By providing the desired DC-link voltage, output voltage, output power, output current ripple factor, maximum temperatures, and semiconductor and heatsink databases, the algorithm calculates a set of feasible designs and points to the one with the lowest semiconductor losses, dimensions, or cost.