400GbE Technology Demonstration Using CFP8 Pluggable Modules

Author:

Yue Yang,Wang Qiang,Yao Jian,O’Neil Jason,Pudvay Daniel,Anderson Jon

Abstract

In this article, we first review the current status of 400GBASE client-side optics standards and multi-source agreements (MSAs). We then compare different form factors for 400GE modules, including CFP8, OSFP and QSFP-DD. The essential techniques to implement 400GE, such as pulse amplitude modulation (PAM4), forward error correction (FEC) and a continuous time-domain linear equalizer (CTLE), are discussed. A 400GE physical interface card (PIC) in Juniper’s PTX5000 platform has been developed, conforming to the latest IEEE802.3bs standard. To validate the PIC’s performance, a commercial optical network tester (ONT) and the PIC are optically interconnected through two CFP8-LR8 modules. The CFP8-LR8 module utilizes eight optical wavelengths through coarse wavelength division multiplexing (CWDM). Each wavelength carries 50 Gb/s PAM4 signal. The signal transmits through 10 km of single mode fiber (SMF). The ONT generates framed 400GE signal and sends it to the PIC through the first CFP8 module. The PIC recovers the signal, performs an internal loopback, and sends 400GE signal back to the ONT through the second CFP8 module. The optical spectrum, eye diagram, receiver sensitivity, long time soaking results, and internal digital diagnosis monitoring (DDM) result are fully characterized. The pre-FEC bit error rate (BER) is well below the KP4 FEC threshold of 2.2 × 10−4. After KP4 FEC, error-free performance over 30 km of SMF is achieved. In this way, we demonstrate both the interoperation between the PIC and the ONT, as well as the interoperation between the two CFP8 modules. This demonstration represents the successful implementation of the 400GE interface in the core IP/MPLS router.

Publisher

MDPI AG

Subject

Fluid Flow and Transfer Processes,Computer Science Applications,Process Chemistry and Technology,General Engineering,Instrumentation,General Materials Science

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