Technique of High-Field Electron Injection for Wafer-Level Testing of Gate Dielectrics of MIS Devices

Author:

Andreev Dmitrii V.1ORCID,Andreev Vladimir V.1ORCID,Konuhova Marina2ORCID,Popov Anatoli I.2ORCID

Affiliation:

1. Bauman Moscow State Technical University, The Kaluga Branch, 2 Bazhenov St., 248000 Kaluga, Russia

2. Institute of Solid State Physics, University of Latvia, 8 Kengaraga, LV-1063 Riga, Latvia

Abstract

We propose a technique for the wafer-level testing of the gate dielectrics of metal–insulator–semiconductor (MIS) devices by the high-field injection of electrons into the dielectric using a mode of increasing injection current density up to a set level. This method provides the capability to control a change in the charge state of the gate dielectric during all the testing. The proposed technique makes it possible to assess the integrity of the thin dielectric and at the same time to control the charge effects of its degradation. The method in particular can be used for manufacturing processes to control integrated circuits (ICs) based on MIS structures. In the paper, we propose an advanced algorithm of the Bounded J-Ramp testing of the gate dielectric and receive its approval when monitoring the quality of the gate dielectrics of production-manufactured MIS devices. We found that the maximum value of positive charge obtained when tested by the proposed method was a value close to that obtained when the charge was injected into the dielectric under a constant current with a Bounded J value despite large differences in the rate of degradation of the dielectric.

Funder

HORIZON 2020 RISE-RADON

European Union’s Horizon 2020 Framework Programme

Ministry of Science and Higher Education of the Russian Federation

Publisher

MDPI AG

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