Abstract
In this paper, we focus on Orthogonal Frequency Division Multiplexing (OFDM) transceivers where undersampling is employed by the receiver Analog/Digital Converter (ADC) when sparse information is exchanged. Several Fast Fourier Transform (FFT) symmetry properties are exploited to allow the substitution of specific input values by others that have already been sampled by the ADC. Several architectures have been proposed in the literature for efficient FFT implementations in terms of power, speed and hardware resources. The FFT input/output values, twiddle factors, etc., are complex numbers with their real and imaginary parts being represented using fixed point format. A tradeoff has to be made between rounding error and complexity. The optimal minimum FFT word length is investigated by combining the undersampling and the rounding error. A configurable new FFT architecture has been developed in hardware description language to test the error model with various FFT sizes, word lengths and Quadrature Amplitude Modulations (QAM). A system designer can take into account the sparseness of the input data and define the desired rounding and undersampling error relation. Τhe developed error model would then predict the required word length and ADC resolution with average Root Mean Square Error (RMSE) less than 1.
Subject
Physics and Astronomy (miscellaneous),General Mathematics,Chemistry (miscellaneous),Computer Science (miscellaneous)